CPU Simulator 0.1

CPU Simulator serves as a valuable resource for students pursuing A-Level AQA Computer Science, specifically addressing the intricacies of CPU functionality. It offers an in-depth exploration of the fetch-decode-execute cycle, elucidating how processor components evolve throughout each stage contingent upon the executed code.

The application features an interactive interface that clearly delineates the various components of the CPU, displaying their respective contents and changes occurring during each clock cycle. Additionally, it includes an integrated development environment (IDE) for assembly code creation, alongside tools for viewing corresponding machine code and modifying user preferences.

Key components available for tracking include:

• Address Bus
• Data Bus
• Clock
• Program Counter (PC)
• Current Instruction Register (CIR)
• Memory Address Register (MAR)
• Memory Buffer Register (MBR)
• 128 General Purpose Registers
• Arithmetic Logic Unit (ALU)
• Status Register
• 128 Data Memory Locations
• Instruction Memory

The simulator allows users to modify various options, such as:

• Run Speed (including stepped mode)
• Number Base

This document-based application empowers users to create and execute an infinite number of unique simulations, with capabilities to save and share their work. Its primary focus is to facilitate the teaching of section ‘4.7.3.2 The Fetch-Execute cycle and the role of registers within it’ as outlined in the AQA A-Level specification, utilizing the Harvard Architecture.